root@OpenWrt:/tmp# sysupgrade -F openwrt-mediatek-mt7623-unielec_u7623-02-squash fs-sysupgrade.itb Wed Jan 19 17:30:24 UTC 2022 upgrade: Device unielec,u7623-02-emmc-512m not supported by this image Wed Jan 19 17:30:24 UTC 2022 upgrade: Supported devices: unielec,u7623-02 Invalid image type. Image check failed but --force given - will update anyway! Wed Jan 19 17:30:24 UTC 2022 upgrade: Saving config files... Wed Jan 19 17:30:24 UTC 2022 upgrade: Commencing upgrade. Closing all shell sessions. Watchdog handover: fd=3 - watchdog - killall: telnetd: no process killed Wed Jan 19 17:30:24 UTC 2022 upgrade: Sending TERM to remaining processes ... odhcpd ntpd udhcpc odhcp6c dnsmasq ubusd urngd uhttpd logd rpc d netifd Wed Jan 19 17:30:27 UTC 2022 upgrade: Sending KILL to remaining processes ... [ 1094.234425] sh (2203): drop_caches: 3 Wed Jan 19 17:30:29 UTC 2022 upgrade: Switching to ramdisk... Wed Jan 19 17:30:30 UTC 2022 upgrade: Performing system upgrade... [ 1096.117593] F2FS-fs (mmcblk0p1): Magic Mismatch, valid(0xf2f52010) - read(0xe24dd048) [ 1096.125471] F2FS-fs (mmcblk0p1): Can't find valid F2FS filesystem in 1th superblock [ 1096.134248] F2FS-fs (mmcblk0p1): Magic Mismatch, valid(0xf2f52010) - read(0x81e53ffc) [ 1096.142087] F2FS-fs (mmcblk0p1): Can't find valid F2FS filesystem in 2th superblock mount: mounting /dev/mmcblk0p1 on /tmp/recovery failed: Invalid argument umount: can't unmount /tmp/recovery: Invalid argument 0+254 records in 0+254 records out [ 1097.099012] F2FS-fs (mmcblk0p1): Magic Mismatch, valid(0xf2f52010) - read(0xe24dd048) [ 1097.106904] F2FS-fs (mmcblk0p1): Can't find valid F2FS filesystem in 1th superblock [ 1097.115661] F2FS-fs (mmcblk0p1): Magic Mismatch, valid(0xf2f52010) - read(0x81e53ffc) [ 1097.123503] F2FS-fs (mmcblk0p1): Can't find valid F2FS filesystem in 2th superblock mount: mounting /dev/mmcblk0p1 on /tmp/recovery failed: Invalid argument umount: can't unmount /tmp/recovery: Invalid argument mount: mounting /dev/mmcblk0p1 on /tmp/recovery failed: Invalid argument umount: can't unmount /tmp/recovery: Invalid argument Wed Jan 19 17:30:31 UTC 2022 upgrade: Upgrade completed Wed Jan 19 17:30:32 UTC 2022 upgrade: Rebooting system... umount: can't unmount /dev: Resource busy umount: can't unmount /tmp: Resource busy [ 1098.187540] reboot: Restarting system [USBD] USB PRB0 LineState: 0 [USBD] USB cable/ No Cable inserted! [PLFM] Keep stay in USB Mode Platform initialization is ok wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_cpu_freq = 1040000Khz wait for frequency meter finish, CLK26CALI = 0x90 mt_pll_post_init: mt_get_bus_freq = 273000Khz wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_mem_freq = 133250Khz [PWRAP] pwrap_init_preloader [PWRAP] pwrap_init [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=800 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=1021 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=300B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97 [PWRAP] _pwrap_init_reg_clock [PMIC_WRAP]wrap_init pass,the return value=0. [pmic6323_init] Preloader Start.................. [pmic6323_init] PMIC CHIP Code = 0x2023 INT_MISC_CON: 1 TOP_RST_MISC: 1 pl pmic powerkey Press [pmic6323_init] powerKey = 1 [pmic6323_init] is USB in = 0xB004 [pmic6323_init] Reg[0x11A]=0x1B [pmic6323_init] Done................... mt7623 disable long press reset ->>>>> mt7623 disable long press reset <<<<<- mt7623 VPA supplied by 1.0V to MT7530 -> mt7623 VPA supplied by 1.0V to MT7530 <- mt7623 enables RG_VGP1_EN for LCM -> mt7623 enables RG_VGP1_EN for LCM <- MT7623 E2 setting => MT7623 E2 setting <= [PLFM] Init I2C: OK(0) [PLFM] Init PWRAP: OK(0) [PLFM] Init PMIC: OK(0) [PLFM] chip[CA00] [BLDR] Build Time: 20151226-103315 ==== Dump RGU Reg ======== RGU MODE: 14 RGU LENGTH: FFE0 RGU STA: 40000000 RGU INTERVAL: FFF RGU SWSYSRST: 0 ==== Dump RGU Reg End ==== RGU: g_rgu_satus:2 mtk_wdt_mode_config mode value=10, tmp:22000010 PL RGU RST: ?? SW reset with bypass power key flag Find bypass powerkey flag RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3) kpd read addr: 0x0040: data:0x4001 Enter mtk_kpd_gpio_set! kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0 kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0 after set KP enable: KP_SEL = 0x0 ! MTK_PMIC_RST_KEY is used for this project! [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3967 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] bbpu = 0xD, con = 0x426 [RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2 Writeif_unlock [RTC] RTC_SPAR0=0x40 rtc_2sec_reboot_check cali=1536 [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800 [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1 [RTC] bbpu = 0xD, con = 0x426, cali = 0x600 SW reset with bypass power key flag SW reset with bypass power key flag [PLFM] WDT reboot bypass power key! [RTC] rtc_bbpu_power_on done [EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0 [EMI] PCDDR3 [Check]mt_get_mdl_number 0x0 [EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI] MDL number = 0 [EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI][Vcore]0x21E=0x48,0x220=0x48 [EMI][Vmem]0x554=0x0 wait for frequency meter finish, CLK26CALI = 0x81 [EMI] PCDDR3 DRAM Clock = 1600012 KHz, MEMPLL MODE = 2 [EMI] PCDDR3 RXTDN Calibration: Start REXTDN SW calibration... drvp=0xB,drvn=0x9 [EMI] pinmux = 4 =============================================================================== dramc_write_leveling_swcal =============================================================================== delay byte0 byte1 byte2 byte3 ----------------------------- 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 3 0 0 0 0 4 0 0 0 0 5 0 0 0 0 6 0 0 0 0 7 0 0 0 0 8 0 0 0 0 9 0 0 0 0 10 0 0 1 1 11 0 0 1 1 12 0 0 1 1 13 0 0 1 1 14 1 1 1 1 15 1 1 1 1 pass bytecount = 4 byte_i status best delay 0 2 14 1 2 14 2 2 10 3 2 10 ======================================== [write leveling]DQS: 0xAAEE, DQM: 0xAAEE [write leveling after remap]DQ byte0 reg: 0x200 val: 0xEEEEEEEE [write leveling after remap]DQ byte1 reg: 0x204 val: 0xEEEEEEEE [write leveling after remap]DQ byte2 reg: 0x208 val: 0xAAAAAAAA [write leveling after remap]DQ byte3 reg: 0x20C val: 0xAAAAAAAA ============================================= X-axis: DQS Gating Window Delay (Fine Scale) Y-axis: DQS Gating Window Delay (Coarse Scale) ============================================= 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0011:| 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0012:| 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0013:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0014:| 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Rank 0 coarse tune value selection : 18, 18 18 56 rank 0 coarse = 18 rank 0 fine = 56 00:| 0 0 0 0 0 0 0 0 1 1 1 0 opt_dle value:13 ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-31 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 0 0 0 0 0 0 0 0 0 0 10 | 0 0 0 0 0 0 0 0 0 0 20 | 0 0 0 0 0 0 0 0 0 0 30 | 0 0 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =43 DQS1 = 34 DQS2 =45 DQS3 = 37 ================================================================== bit DQS0 bit DQS1 bit DQS2 bit DQS3 0 (15~60)37 8 (8~53)30 16 (22~60)41 24 (7~50)28 1 (19~61)40 9 (3~48)25 17 (21~62)41 25 (11~53)32 2 (20~65)42 10 (10~53)31 18 (19~58)38 26 (10~50)30 3 (17~63)40 11 (5~50)27 19 (17~61)39 27 (13~58)35 4 (21~66)43 12 (9~57)33 20 (22~69)45 28 (15~60)37 5 (17~58)37 13 (8~50)29 21 (19~58)38 29 (13~50)31 6 (19~64)41 14 (7~58)32 22 (23~65)44 30 (11~56)33 7 (21~65)43 15 (11~58)34 23 (23~65)44 31 (13~58)35 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 6 3 1 3 0 6 2 0 4 9 10 | 3 7 1 5 2 0 4 4 7 6 20 | 0 7 1 1 9 5 7 2 0 6 30 | 4 2 ================================================================== *DQIDLY1 = 0x3010306 *DQIDLY2 = 0x20600 *DQIDLY3 = 0x7030904 *DQIDLY4 = 0x20501 *DQIDLY5 = 0x6070404 *DQIDLY6 = 0x1010700 *DQIDLY7 = 0x2070509 *DQIDLY8 = 0x2040600 *DRAMC_R0DELDLY = 0x252D222B [MEM]CONA:3122,conf1:F07486A3 DM4BitMux = 1 DQSO 0 in TX per-bit = 0 <= DQSO 0 in WL = 14 DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 14 DQSO 2 in TX per-bit = 3 <= DQSO 2 in WL = 10 DQSO 3 in TX per-bit = 1 <= DQSO 3 in WL = 10 Tx DQM dly = 0xA952 Tx DQM dly bit4 = 0x3 DRAMC_DQODLY1=33447265h DRAMC_DQODLY2=45673024h DRAMC_DQODLY3=97B9A9ABh DRAMC_DQODLY4=AACACAAAh Tx DQ dly bit4 = 0xFFFF Tx DQS dly = 0xAAEE Tx DQS dly bit4 = 0x0 TX Byte0: DQ - 19, DQS - 9. win_sum= 27 TX Byte1: DQ - 22, DQS - 8. win_sum= 29 TX Byte2: DQ - 14, DQS - 15. win_sum= 28 TX Byte3: DQ - 18, DQS - 16. win_sum= 33 DRAMC calibration takes 651029654 CPU cycles [EMI] DRAMC calibration passed [MEM] complex R/W mem test pass 0:dram_rank_size:40000000 [Dram_Buffer] dram size:1073741824 [Dram_Buffer] structure size: 1725560 [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 [PLFM] Init Boot Device: OK(0) [PART] blksz: 512B [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) [PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks) [PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks) [PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks) [PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks) [PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks) [PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks) [PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks) [PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks) [platform_vusb_on] PASS [TOOL] PMIC not dectect usb cable! [TOOL] listen ended, receive size:0! [TOOL] wait sync time 150ms->5ms [TOOL] receieved data: () Device APC domain init setup: bootloader load uboot ,the address of uboot is 81E00000 [PART]partition name UBOOT [PART]partition start block 0x200 [PART]partition size 0x80000 [PART]partition blks 0x400 [PART]partition flags 0x0 [PART]partition name 0x8 [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xBFB50000) [BlkDev.c 101 ]partition block size 0x200 ,blks:0xE90000 [BlkDev.c 101 ]partition block erase size 0x200 bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 rootfstype=squashfs,ext4 rootwait 3126560 bytes read in 154 ms (19.4 MiB/s) ## Loading kernel from FIT Image at 88000000 ... Bad FIT kernel image format! ERROR: can't get kernel image! U-Boot>