BPI-R64 fully-tickless hardpps soak — 5 s GPS timepulse

Cortex-A53, 12.5 MHz counter, NO_HZ_IDLE, all periodic wakeup sources quiesced (vmstat, runtime-PM autosuspend, fair dl_server, ethernet pollers) — the only wakeup is the GPS pulse every 5 s. hardpps disciplines CLOCK_REALTIME via STA_PPSTIME with phase delivery scaled to 1/5 rate (matching the 5 s delivery window — the unscaled rate is unstable, gain −5). Kernel carries the timekeeping series; snapshot ntp_error captured in the PPS hardirq at every pulse.

10368 pulses over 2.9 h. Steady state (|ntp_error| at pulse, after 60 min): median 1 ns, p95 10 ns, p99 27 ns, max 55 ns. Corrected pulse phase: median 0.3 µs, p95 2.3 µs (irq-latency floor).

Per-pulse snapshot ntp_error

Pulse arrival phase (corrected ts_real)

Discipline state

Tickless gap verification

ntp_error drain lifecycle

The proportional drain engages when accumulated ntp_error exceeds one minute's worth of ±1-dither delivery (~45 ns here), repays over ~10 s re-sized each second, hands back to the dither below threshold, and aborts mid-second if it overshoots zero.

Methodology

This run is the test asked for on the list: hardpps on a tickless kernel driven by a real PPS source, with its real jitter and IRQ latency, and the CPU genuinely idle between pulses.

Data